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[XPU CI] Expand stage-a and consolidate stage-b tests into stage-a (#27156)

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Co-authored-by: vshekhawat-hlab <vshekhawat@habana.ai>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
This commit is contained in:
ashwini rathi
2026-06-04 12:00:25 +08:00
committed by GitHub
co-authored by vshekhawat-hlab Ma Mingfei
parent 10ab7c919f
commit 5c8a04ac4e
9 changed files with 68 additions and 69 deletions
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test/registered/attention/test_chunk_gated_delta_rule.py
+1 -1
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@@ -10,7 +10,7 @@ from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_cuda_ci, register_xpu_ci
register_cuda_ci(est_time=11, stage="base-b", runner_config="1-gpu-large")
register_xpu_ci(est_time=900, suite="stage-b-test-1-gpu-xpu")
register_xpu_ci(est_time=900, suite="stage-a-test-1-gpu-xpu")
@unittest.skipIf(
test/registered/lora/test_lora_eviction_policy.py
+2
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@@ -24,11 +24,13 @@ from sglang.test.ci.ci_register import (
register_amd_ci,
register_cpu_ci,
register_cuda_ci,
register_xpu_ci,
)
register_cuda_ci(est_time=200, suite="nightly-1-gpu", nightly=True)
register_amd_ci(est_time=200, suite="nightly-amd-1-gpu", nightly=True)
register_cpu_ci(est_time=6, suite="base-b-test-cpu")
register_xpu_ci(est_time=10, suite="stage-a-test-1-gpu-xpu")
class TestLoRAEvictionPolicy(unittest.TestCase):
test/registered/unit/sampling/test_sampling_params.py
+2 -1
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@@ -1,9 +1,10 @@
"""Unit tests for srt/sampling/sampling_params.py — no server, no model loading."""
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.ci.ci_register import register_cpu_ci, register_xpu_ci
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-b-test-cpu")
register_xpu_ci(est_time=10, suite="stage-a-test-1-gpu-xpu")
import unittest
from unittest.mock import MagicMock
test/registered/unit/spec/test_adaptive_spec_params.py
+2 -1
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@@ -5,9 +5,10 @@ import unittest
from sglang.srt.speculative.adaptive_spec_params import (
AdaptiveSpeculativeParams,
)
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.ci.ci_register import register_cpu_ci, register_xpu_ci
register_cpu_ci(est_time=6, suite="base-a-test-cpu")
register_xpu_ci(est_time=10, suite="stage-a-test-1-gpu-xpu")
class TestAdaptiveSpeculativeParams(unittest.TestCase):
test/registered/xpu/test_deepseek_ocr.py
+1 -1
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@@ -19,7 +19,7 @@ from sglang.test.test_utils import (
popen_launch_server,
)
register_xpu_ci(est_time=360, suite="stage-b-test-1-gpu-xpu")
register_xpu_ci(est_time=360, suite="stage-a-test-1-gpu-xpu")
class TestDeepSeekOCR(CustomTestCase):
test/registered/xpu/test_deepseek_ocr_triton.py
+1 -1
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@@ -18,7 +18,7 @@ from sglang.test.test_utils import (
register_xpu_ci(
est_time=360,
suite="stage-b-test-1-gpu-xpu",
suite="stage-a-test-1-gpu-xpu",
disabled="Temporarily disabled until Triton-XPU upgrade",
)
test/registered/xpu/test_intel_xpu_backend.py
+1 -1
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@@ -16,7 +16,7 @@ from sglang.test.test_utils import (
run_bench_one_batch,
)
register_xpu_ci(est_time=600, suite="stage-b-test-1-gpu-xpu")
register_xpu_ci(est_time=600, suite="stage-a-test-1-gpu-xpu")
def intel_xpu_benchmark(
test/registered/xpu/test_topk.py
+1 -1
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@@ -11,7 +11,7 @@ from sglang.srt.layers.moe.topk import (
from sglang.test.ci.ci_register import register_xpu_ci
from sglang.test.test_utils import CustomTestCase
register_xpu_ci(est_time=5, suite="stage-b-test-1-gpu-xpu")
register_xpu_ci(est_time=5, suite="stage-a-test-1-gpu-xpu")
# Nemotron-3 uses biased_grouped_topk