[HiCache] Keep auxiliary load-back out of Full KV pending ownership (#36317)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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@@ -1983,19 +1983,16 @@ class UnifiedTreeCore(UnifiedTreeCoreInterface):
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node = self.node_by_id(node_id)
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cache_actions: list[CacheAction | ComponentAction] = []
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if self.is_write_back:
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# Write-back may reclaim a duplicate host copy while H->D DMA is
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# still reading it, so pin every source node until the ack.
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for xfers in ([kv_xfer], *comp_xfers.values()):
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for xfer in xfers:
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for nid in xfer.nodes_to_load or ():
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pinned = self.node_by_id(nid)
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# One live load-back per node; only the same anchor may
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# re-pin (a node can sit in Full and aux transfer lists).
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assert pinned.load_back_pending_id in (None, node_id), (
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f"node {nid} pinned by load-back "
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f"{pinned.load_back_pending_id}, new anchor {node_id}"
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)
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pinned.load_back_pending_id = node_id
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# Pin Full KV host slots against duplicate reclaim until the ack.
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# Auxiliary pools have independent host locks and may legitimately
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# load the same radix node under a different anchor.
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for nid in kv_xfer.nodes_to_load or ():
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pinned = self.node_by_id(nid)
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assert pinned.load_back_pending_id in (None, node_id), (
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f"node {nid} pinned by load-back "
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f"{pinned.load_back_pending_id}, new anchor {node_id}"
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)
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pinned.load_back_pending_id = node_id
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kv_xfer.device_indices = device_indices
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self.components_by_type[BASE_COMPONENT_TYPE].commit_hicache_transfer(
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node,
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