[AMD] Dsv4/pr2 compressor opt (#26208)

Co-authored-by: wunhuang <wunhuang@amd.com>
Co-authored-by: Thomas Wang <1am9trash@gmail.com>
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: amd-danli103 <danli103@amd.com>
Co-authored-by: Lin, Soga <soga.lin@amd.com>
Co-authored-by: Raiden-Makoto <Raiden-Makoto@users.noreply.github.com>
Co-authored-by: Hubert Lu <55214931+hubertlu-tw@users.noreply.github.com>
Co-authored-by: yichiche@amd.com <jacky.cheng>
Co-authored-by: yctseng0211 <yctseng@amd.com>
Co-authored-by: Bingxu Chen <bingxche@amd.com>
This commit is contained in:
kk
2026-05-25 23:54:40 -07:00
committed by GitHub
co-authored by wunhuang Thomas Wang Xinyi Song HaiShaw amd-danli103 Lin, Soga Raiden-Makoto Hubert Lu yichiche@amd.com yctseng0211 Bingxu Chen
parent 7c0fbc8c2e
commit 3f5e2c7688
31 changed files with 8829 additions and 149 deletions
+8
View File
@@ -36,6 +36,9 @@ else:
concat_mla_absorb_q,
concat_mla_k,
copy_to_gpu_no_ce,
dsv4_fused_k_norm_rope_flashmla,
dsv4_fused_q_indexer_rope_hadamard_quant,
dsv4_fused_q_norm_rope,
fused_add_rmsnorm,
gelu_and_mul,
gelu_tanh_and_mul,
@@ -125,6 +128,7 @@ else:
if torch.version.hip is not None:
from sgl_kernel.elementwise import gelu_quick
from sgl_kernel.top_k import deepseek_v4_topk_transform_512
if hasattr(torch.version, "musa") and torch.version.musa is not None:
from sgl_kernel.musa import (
@@ -152,6 +156,9 @@ else:
"cutlass_mla_get_workspace_size",
"dsv3_fused_a_gemm",
"dsv3_router_gemm",
"dsv4_fused_k_norm_rope_flashmla",
"dsv4_fused_q_indexer_rope_hadamard_quant",
"dsv4_fused_q_norm_rope",
"es_fp8_blockwise_scaled_grouped_mm",
"es_sm100_mxfp8_blockscaled_grouped_mm",
"es_sm100_mxfp8_blockscaled_grouped_quant",
@@ -205,6 +212,7 @@ else:
if torch.version.hip is not None:
_DEBUG_EXPORT_NAMES.append("gelu_quick")
_DEBUG_EXPORT_NAMES.append("deepseek_v4_topk_transform_512")
for _name in _DEBUG_EXPORT_NAMES:
if _name in globals():