[AMD] fix dsv4 indexer dtype dispatch on gfx950 (#29479)
Co-authored-by: HAI <hixiao@gmail.com>
This commit is contained in:
@@ -22,6 +22,7 @@ from sglang.srt.layers.attention.dsv4.metadata import (
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PagedIndexerMetadata,
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PagedIndexerMetadata,
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)
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)
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from sglang.srt.layers.linear import ReplicatedLinear
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from sglang.srt.layers.linear import ReplicatedLinear
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from sglang.srt.layers.quantization.fp8_kernel import is_fp8_fnuz
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from sglang.srt.model_executor.forward_batch_info import ForwardMode
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from sglang.srt.model_executor.forward_batch_info import ForwardMode
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from sglang.srt.model_executor.runner_backend_utils.breakable_cuda_graph.context import (
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from sglang.srt.model_executor.runner_backend_utils.breakable_cuda_graph.context import (
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is_in_breakable_cuda_graph,
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is_in_breakable_cuda_graph,
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@@ -44,12 +45,8 @@ if TYPE_CHECKING:
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from sglang.srt.model_executor.forward_batch_info import ForwardBatch
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from sglang.srt.model_executor.forward_batch_info import ForwardBatch
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if is_hip():
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FP8_DTYPE = torch.float8_e4m3fnuz if is_fp8_fnuz() else torch.float8_e4m3fn
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FP8_DTYPE = torch.float8_e4m3fnuz
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FP8_MAX = torch.finfo(FP8_DTYPE).max
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else:
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FP8_DTYPE = torch.float8_e4m3fn
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FP8_MAX = torch.finfo(FP8_DTYPE).max
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IndexerQuery: TypeAlias = Union[torch.Tensor, Tuple[torch.Tensor, torch.Tensor]]
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IndexerQuery: TypeAlias = Union[torch.Tensor, Tuple[torch.Tensor, torch.Tensor]]
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@@ -58,12 +58,15 @@ import triton
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import triton.language as tl
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import triton.language as tl
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from aiter.ops.triton.utils.device_info import get_num_sms
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from aiter.ops.triton.utils.device_info import get_num_sms
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from sglang.srt.layers.quantization.fp8_kernel import is_fp8_fnuz
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LOG2E = 1.4426950408889634 # log2(e); folded into qk_scale so softmax can use exp2.
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LOG2E = 1.4426950408889634 # log2(e); folded into qk_scale so softmax can use exp2.
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_MAX_KV_SPLITS = 64 # Hard cap on kv_splits (see _kv_splits_heuristic).
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_MAX_KV_SPLITS = 64 # Hard cap on kv_splits (see _kv_splits_heuristic).
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# FP8 KV cache (1xGROUP_SIZE block-scale quantization).
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# FP8 KV cache (1xGROUP_SIZE block-scale quantization).
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#
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#
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# Storage: unified_kv[total_pages, D] in e4m3fnuz + kv_scales[total_pages,
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# Storage: unified_kv[total_pages, D] in e4m3fnuz (gfx942 only) / e4m3fn +
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# kv_scales[total_pages,
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# D // GROUP_SIZE] in fp32. Per-slot, D is split into NUM_GROUPS chunks of
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# D // GROUP_SIZE] in fp32. Per-slot, D is split into NUM_GROUPS chunks of
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# GROUP_SIZE elements; each chunk shares one fp32 scale.
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# GROUP_SIZE elements; each chunk shares one fp32 scale.
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# Dequant in-kernel: kv_bf16 = kv_fp8.to(fp32) * scale[d // GROUP_SIZE], cast
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# Dequant in-kernel: kv_bf16 = kv_fp8.to(fp32) * scale[d // GROUP_SIZE], cast
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@@ -73,7 +76,9 @@ _MAX_KV_SPLITS = 64 # Hard cap on kv_splits (see _kv_splits_heuristic).
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# per slot, 4 bytes each → +6.25% storage on top of the fp8 pool (vs the
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# per slot, 4 bytes each → +6.25% storage on top of the fp8 pool (vs the
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# halving from bf16→fp8 = 2× saving — net ~46% read bandwidth reduction).
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# halving from bf16→fp8 = 2× saving — net ~46% read bandwidth reduction).
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_FP8_GROUP_SIZE = 64
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_FP8_GROUP_SIZE = 64
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_FP8_DTYPE = torch.float8_e4m3fnuz
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# Match the KV-cache write format: fnuz only on AMD gfx942; Other platform e.g.
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# gfx950 store e4m3fn. See quant_k_cache.py / indexer.py FP8_DTYPE.
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_FP8_DTYPE = torch.float8_e4m3fnuz if is_fp8_fnuz() else torch.float8_e4m3fn
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@functools.lru_cache(maxsize=1)
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@functools.lru_cache(maxsize=1)
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