[Docs] Add AMD-specific HiCache config for DeepSeek V4 playground (#31122)
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
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co-authored by
Claude Opus 4.6
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1b9f228838
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3264477a07
@@ -514,6 +514,10 @@ To enable HiCache, open the **HiCache** card in the [Playground above](#playgrou
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- **L2 (GPU + CPU)** — leave Storage on `auto` (default). Cold KV pages spill to CPU pinned memory only.
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- **L2 (GPU + CPU)** — leave Storage on `auto` (default). Cold KV pages spill to CPU pinned memory only.
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- **L3 (GPU + CPU + Storage)** — pick a Storage backend (`file` / `mooncake` / `hf3fs` / `nixl`); the Playground emits the canonical `page_first_direct` mem-layout + `direct` IO backend + `wait_complete` prefetch policy, matching the [HiCache best-practices recipe](../../../docs/advanced_features/hicache_best_practices).
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- **L3 (GPU + CPU + Storage)** — pick a Storage backend (`file` / `mooncake` / `hf3fs` / `nixl`); the Playground emits the canonical `page_first_direct` mem-layout + `direct` IO backend + `wait_complete` prefetch policy, matching the [HiCache best-practices recipe](../../../docs/advanced_features/hicache_best_practices).
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For AMD devices,
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- **L2 (GPU + CPU)** — leave Storage on `auto` (default). Cold KV pages spill to CPU pinned memory only. Use `direct` IO backend + `page_first_direct` or `layer-first` mem-layout.
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- **L3 (GPU + CPU + Storage)** — pick a Storage backend (`file`); the Playground emits the canonical `page_first_direct` mem-layout + `direct` IO backend + `wait_complete` prefetch policy, matching the [HiCache best-practices recipe](../../../docs/advanced_features/hicache_best_practices).
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The Write policy knob defaults to `write_through` (the upstream default); switch to `write_back` / `write_through_selective` to trade durability for write speed when the storage tier is slow.
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The Write policy knob defaults to `write_through` (the upstream default); switch to `write_back` / `write_through_selective` to trade durability for write speed when the storage tier is slow.
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For more details, see the [HiCache documentation](../../../docs/advanced_features/hicache).
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For more details, see the [HiCache documentation](../../../docs/advanced_features/hicache).
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@@ -1014,19 +1014,31 @@ export const Playground = ({ config }) => {
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"--hicache-storage-backend", "--hicache-storage-prefetch-policy",
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"--hicache-storage-backend", "--hicache-storage-prefetch-policy",
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]);
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]);
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if (value.enable) {
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if (value.enable) {
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const isAmd = sel && /^mi\d/.test(sel.hw);
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const ratio = (isAmd && fc.amdIo && fc.amdIo.ratio) || 2;
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const useAmdIo = isAmd && fc.amdIo;
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const adds = [
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const adds = [
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"--enable-hierarchical-cache",
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"--enable-hierarchical-cache",
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"--hicache-ratio 2",
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`--hicache-ratio ${ratio}`,
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"--hicache-size 0",
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];
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];
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if (value.backend) {
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if (!useAmdIo) {
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adds.push("--hicache-size 0");
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}
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// Per-model configs can declare fc.amdIo = { memLayout, ioBackend, ratio }
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// for AMD ROCm overrides (e.g. page_first_direct + direct on MI355X).
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// Default (NVIDIA): page_first_direct + direct, ratio 2.
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if (useAmdIo) {
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adds.push(`--hicache-mem-layout ${fc.amdIo.memLayout}`,
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`--hicache-io-backend ${fc.amdIo.ioBackend}`);
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} else if (value.backend) {
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adds.push("--hicache-mem-layout page_first_direct",
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adds.push("--hicache-mem-layout page_first_direct",
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"--hicache-io-backend direct");
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"--hicache-io-backend direct");
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}
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}
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const writePolicy = (value.writePolicy && value.writePolicy !== "auto")
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const writePolicy = (value.writePolicy && value.writePolicy !== "auto")
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? value.writePolicy : "write_through";
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? value.writePolicy : "write_through";
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adds.push(`--hicache-write-policy ${writePolicy}`);
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adds.push(`--hicache-write-policy ${writePolicy}`);
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if (value.backend) {
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// When amdStorageFileOnly is set, AMD emits storage flags only for "file".
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if ((isAmd && fc.amdStorageFileOnly) ? value.backend === "file" : !!value.backend) {
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adds.push(`--hicache-storage-backend ${value.backend}`,
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adds.push(`--hicache-storage-backend ${value.backend}`,
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"--hicache-storage-prefetch-policy wait_complete");
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"--hicache-storage-prefetch-policy wait_complete");
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}
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}
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@@ -323,12 +323,18 @@ sgl-eval run aime25 \\
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// ----- Card 6: "Hierarchical KV Cache" -----
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// ----- Card 6: "Hierarchical KV Cache" -----
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hicache: {
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hicache: {
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excludesHw: ["rtx6000"],
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excludesHw: ["rtx6000"],
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// AMD ROCm (MI300X/MI325X/MI350X/MI355X): page_first_direct + direct io.
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amdIo: { memLayout: "page_first_direct", ioBackend: "direct", ratio: 4 },
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amdStorageFileOnly: true,
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backends: [
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backends: [
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{ id: null, label: "Auto" },
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{ id: null, label: "Auto" },
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{ id: "file", label: "File" },
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{ id: "file", label: "File" },
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{ id: "mooncake", label: "Mooncake" },
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{ id: "mooncake", label: "Mooncake",
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{ id: "hf3fs", label: "HF3FS" },
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hide: { hw: ["mi300x", "mi355x"] } },
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{ id: "nixl", label: "NiXL" },
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{ id: "hf3fs", label: "HF3FS",
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hide: { hw: ["mi300x", "mi355x"] } },
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{ id: "nixl", label: "NiXL",
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hide: { hw: ["mi300x", "mi355x"] } },
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],
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],
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writePolicies: [
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writePolicies: [
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{ id: "auto", label: "Auto" },
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{ id: "auto", label: "Auto" },
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