Check the topology identities where the layout is written, and build at the published widths (#40340)

benchmark/kernels/all_reduce/benchmark_mscclpp.py

@@ -30,6 +30,7 @@ from sglang.srt.distributed.parallel_state import (
     initialize_model_parallel,
     set_mscclpp_all_reduce,
 )
+from sglang.test.test_utils import publish_build_topology
 
 
 def torch_allreduce(torch_input: torch.Tensor, group: ProcessGroup) -> torch.Tensor:
@@ -173,7 +174,8 @@ if __name__ == "__main__":
         rank=rank,
         local_rank=rank % 8,
     )
-    initialize_model_parallel(tensor_model_parallel_size=world_size)
+    publish_build_topology(world_rank=rank, tp_size=world_size)
+    initialize_model_parallel()
     group = get_tensor_model_parallel_group().device_group
     cpu_group = get_tensor_model_parallel_group().cpu_group
     pynccl_comm = get_tensor_model_parallel_group().pynccl_comm