[AMD] Update amd k3 cookbook for PR#34580 (#35263)
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@@ -29,7 +29,8 @@ Then run the **Python** output of the command panel below in that environment.
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<Tab title="Docker">
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<Tab title="Docker">
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```bash Command
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```bash Command
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docker pull lmsysorg/sglang:latest
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docker pull lmsysorg/sglang:latest # NVIDIA (CUDA)
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docker pull lmsysorg/sglang-rocm:v0.5.17-rocm720-mi35x-20260817 # AMD MI350X / MI355X (ROCm)
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```
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```
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For how to launch the image, see [Install → Method 3: Using Docker](../../../docs/get-started/install#method-3-using-docker). Substitute the inner `sglang serve ...` with what the command generator below produces.
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For how to launch the image, see [Install → Method 3: Using Docker](../../../docs/get-started/install#method-3-using-docker). Substitute the inner `sglang serve ...` with what the command generator below produces.
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@@ -151,7 +152,7 @@ Speculation: DSPARK holds block size + 1 (= 8) intermediate states per request
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| GB200 4×4 | TP16/DCP16 | MNNVL auto-detected |
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| GB200 4×4 | TP16/DCP16 | MNNVL auto-detected |
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| H200 2×8 (4×8 on Unified High-Throughput) | TP16/EP16 + symm-mem, Marlin + FlashMLA; High-Throughput widens to TP32/EP32 over 4 nodes at mem-frac 0.90 with `extra_buffer_lazy` | same block on every node; export the cross-node NIC (`GLOO_SOCKET_IFNAME` / `NCCL_SOCKET_IFNAME`, `SGLANG_HOST_IP`); keep `NCCL_MNNVL_ENABLE=1 NCCL_CUMEM_ENABLE=1` |
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| H200 2×8 (4×8 on Unified High-Throughput) | TP16/EP16 + symm-mem, Marlin + FlashMLA; High-Throughput widens to TP32/EP32 over 4 nodes at mem-frac 0.90 with `extra_buffer_lazy` | same block on every node; export the cross-node NIC (`GLOO_SOCKET_IFNAME` / `NCCL_SOCKET_IFNAME`, `SGLANG_HOST_IP`); keep `NCCL_MNNVL_ENABLE=1 NCCL_CUMEM_ENABLE=1` |
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| H100 4×8 | TP32/EP32, Marlin + FlashMLA | SM90a build of the K3 image; pin NCCL/Gloo to the same NIC on all nodes; least post-weight headroom (80 GB) |
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| H100 4×8 | TP32/EP32, Marlin + FlashMLA | SM90a build of the K3 image; pin NCCL/Gloo to the same NIC on all nodes; least post-weight headroom (80 GB) |
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| MI350X/MI355X 1×8 | TP8 ROCm/AITER | AITER A8W4 FlyDSL MoE, Triton attention, graph bs up to 256, fp8 kvcache; DSPARK supported |
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| MI350X/MI355X 1×8 | TP8 ROCm/AITER | AITER A8W4 FlyDSL MoE, Triton attention (`SGLANG_MLA_DECODE_TUNE=1` for gfx950 MLA decode geometry), graph bs up to 256, fp8 kvcache; DSPARK supported |
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**DCP notes** — the DCP cells are Balanced and High-Throughput on every Blackwell platform, in both the `Unified` and `Decode` roles:
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**DCP notes** — the DCP cells are Balanced and High-Throughput on every Blackwell platform, in both the `Unified` and `Decode` roles:
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@@ -234,7 +234,9 @@ export const config = {
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title: "Spec Decode",
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title: "Spec Decode",
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default: "dspark",
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default: "dspark",
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options: [
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options: [
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{ id: "none", label: "Non-Spec" },
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{ id: "none", label: "Non-Spec",
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env: (s) => (["mi350x", "mi355x"].includes(s.hw) ? ["SGLANG_MLA_DECODE_TUNE=1"] : []),
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},
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{
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{
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id: "dspark",
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id: "dspark",
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label: "DSPARK",
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label: "DSPARK",
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@@ -411,8 +413,8 @@ export const config = {
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gb300: "lmsysorg/sglang:kimi-k3",
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gb300: "lmsysorg/sglang:kimi-k3",
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b200: "lmsysorg/sglang:kimi-k3",
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b200: "lmsysorg/sglang:kimi-k3",
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gb200: "lmsysorg/sglang:kimi-k3",
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gb200: "lmsysorg/sglang:kimi-k3",
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mi350x: "lmsysorg/sglang-rocm:rocm720-mi35x-k3-20260727",
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mi350x: "lmsysorg/sglang-rocm:v0.5.17-rocm720-mi35x-20260817",
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mi355x: "lmsysorg/sglang-rocm:rocm720-mi35x-k3-20260727",
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mi355x: "lmsysorg/sglang-rocm:v0.5.17-rocm720-mi35x-20260817",
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// NVFP4 needs a build with sgl-project/sglang#35077; the purpose-built dev
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// NVFP4 needs a build with sgl-project/sglang#35077; the purpose-built dev
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// image is cut from that PR's head (CUDA 13).
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// image is cut from that PR's head (CUDA 13).
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"b300|nvfp4": "lmsysorg/sglang:dev-dev-kimi-k3-nvfp4",
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"b300|nvfp4": "lmsysorg/sglang:dev-dev-kimi-k3-nvfp4",
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