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[Xeon] CPU CI enhancement for Intel Xeon platforms (#24649)

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This commit is contained in:
MingxuZh
2026-05-28 10:49:04 +08:00
committed by GitHub
parent 81663cb5f1
commit 21ba329dac
88 changed files with 192 additions and 31 deletions
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test/registered/utils/test_log_utils.py
+1
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@@ -11,6 +11,7 @@ from sglang.srt.utils.log_utils import create_log_targets, log_json
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=6, suite="base-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-b-test-cpu")
_LOG_PREFIX_RE = re.compile(r"^\[\d{4}-\d{2}-\d{2} \d{2}:\d{2}:\d{2}\] ")
test/registered/utils/test_model_file_verifier.py
+2 -1
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@@ -20,7 +20,7 @@ from sglang.srt.utils.model_file_verifier import (
generate_checksums,
verify,
)
from sglang.test.ci.ci_register import register_cuda_ci
from sglang.test.ci.ci_register import register_cpu_ci, register_cuda_ci
from sglang.test.test_utils import (
DEFAULT_TIMEOUT_FOR_SERVER_LAUNCH,
DEFAULT_URL_FOR_TEST,
@@ -29,6 +29,7 @@ from sglang.test.test_utils import (
# Note: AMD registration removed - test_model_file_verifier fails on AMD
register_cuda_ci(est_time=120, suite="nightly-1-gpu", nightly=True)
register_cpu_ci(est_time=540, suite="base-b-test-cpu")
MODEL_NAME = "Qwen/Qwen3-0.6B"
test/registered/utils/test_network_address.py
+1
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@@ -7,6 +7,7 @@ from sglang.srt.utils.network import NetworkAddress
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-b-test-cpu")
# Mock get_device() so ServerArgs tests run on CPU-only CI runners
_mock_device = patch("sglang.srt.server_args.get_device", return_value="cuda")
test/registered/utils/test_socket_utils.py
+1
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@@ -16,6 +16,7 @@ from sglang.test.test_utils import CustomTestCase
from sglang.utils import normalize_base_url, release_port, reserve_port
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-b-test-cpu")
class TestTryBindSocket(CustomTestCase):
test/registered/utils/test_type_based_dispatcher.py
+2 -1
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@@ -8,10 +8,11 @@ import timeit
import unittest
from sglang.srt.managers.io_struct import SamplingParams
from sglang.test.ci.ci_register import register_amd_ci
from sglang.test.ci.ci_register import register_amd_ci, register_cpu_ci
from sglang.utils import TypeBasedDispatcher
register_amd_ci(est_time=10, suite="stage-b-test-1-gpu-small-amd")
register_cpu_ci(est_time=8, suite="base-b-test-cpu")
class TestTypeBasedDispatcher(unittest.TestCase):