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[Xeon] CPU CI enhancement for Intel Xeon platforms (#24649)

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This commit is contained in:
MingxuZh
2026-05-28 10:49:04 +08:00
committed by GitHub
parent 81663cb5f1
commit 21ba329dac
88 changed files with 192 additions and 31 deletions
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test/registered/unit/function_call/test_function_call_parser.py
+1
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@@ -32,6 +32,7 @@ from sglang.srt.function_call.qwen3_coder_detector import Qwen3CoderDetector
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=15, suite="base-a-test-cpu")
register_cpu_ci(est_time=61, suite="base-b-test-cpu")
class TestPythonicDetector(unittest.TestCase):
test/registered/unit/function_call/test_json_schema_constraint.py
+1
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@@ -19,6 +19,7 @@ from sglang.srt.function_call.utils import (
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "base-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-b-test-cpu")
class TestJsonSchemaConstraint(unittest.TestCase):
test/registered/unit/function_call/test_parallel_tool_calls.py
+1
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@@ -24,6 +24,7 @@ from sglang.srt.function_call.json_array_parser import JsonArrayParser
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "base-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-b-test-cpu")
class TestParallelToolCalls(unittest.TestCase):
test/registered/unit/function_call/test_unknown_tool_name.py
+1
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@@ -10,6 +10,7 @@ from sglang.srt.function_call.core_types import StreamingParseResult
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "base-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-b-test-cpu")
class DummyDetector(BaseFormatDetector):