[AMD] prepare for MI300x PR runner pool: registry mirror, runner routing, threshold tuning (#23156)

This commit is contained in:
Bingxu Chen
2026-04-21 00:58:23 -07:00
committed by GitHub
parent 74fdf9cd77
commit 09b1d10d59
14 changed files with 145 additions and 117 deletions
@@ -11,6 +11,7 @@ from sglang.test.test_utils import (
DEFAULT_TIMEOUT_FOR_SERVER_LAUNCH,
DEFAULT_URL_FOR_TEST,
CustomTestCase,
is_in_amd_ci,
popen_launch_server,
)
@@ -47,6 +48,12 @@ class TestPyTorchSamplingBackend(CustomTestCase):
metrics = run_eval(args)
self.assertGreaterEqual(metrics["score"], 0.65)
@unittest.skipIf(
is_in_amd_ci(),
"Skip on MI300x: greedy decode is not bit-exact across runs on MI300x "
"(kernel-level numerical jitter), so the assertEqual on identical "
"regenerated text is flaky on this runner pool.",
)
def test_greedy(self):
first_text = None